Department of Electronics and Electrical Engineering
Indian Institute of Technology Guwahati
Guwahati-781039, India

EEE Department, IIT Guwahati

QIP Short-Term Course on
VLSI Architectures for Image and Video Processing Systems
19th - 23rd September, 2011

Department of Electronics and Electrical Engineering
Indian Institute of Technology Guwahati

Information Brochure and Application Form(Download)



BACKGROUND

The field of image and video processing has always been driven by the advances in very-large-scaleintegrated (VLSI) technologies. Therefore, at any given time, Image/Video processing techniques impose several challenges on their implementations. These implementations must satisfy the enforced sampling rate constraints of the real-time Image/Video processing applications and must require less space and power consumption. This course addresses the methodologies needed to design custom or semicustom VLSI circuits for these applications.



COURSE CONTENT
  • Overview of Video compression
  • Efficient Discrete Cosine Transform Architectures
  • Systolic Array Architectures for Video Compression
  • CORDIC based Video Compression Architectures
  • Distributed Arithmetic based architectures for Video Compression
  • Wavelet VLSI Architectures
  • VLSI architectures for motion estimation and compensation
  • Low Power CMOS VLSI design

Course Coordinator :
Dr. Shaik Rafi Ahamed
Email: rafiahamed@iitg.ernet.in
Phone: 0361-258-200