JOHN JOSE

Associate Professor
Department of Computer Science & Engineering
Indian Institute of Technology Guwahati
Guwahati - 781039, Assam, India

Contact Details

Office: Room Number H-201, CSE Dept, IITG
Phone: 0361- 2583256
Email: johnjose [AT] iitg [DOT] ac [DOT] in
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News & Updates [Last updated on 25.09.2024]    || Skip News ||
  • 13.09.2024: Manju R. defended her Ph D. thesis. Congratulations Dr. Manju.
  • 22.08.2024: Amit Puri submitted his Ph.D thesis.
  • 22.08.2024: Sivakumar S. submitted his Ph.D thesis.
  • 18.07.2024: Syam Sankar submitted his Ph.D thesis.
  • 15.07.2024: Syam Sankar rejoined NSSCE Palakkad after his QIP Ph.D.
  • 13.05.2024: Amit Puri joined AMD Bangalore as Senior Silicon Design Engineer.
  • 01.05.2024: Phrangboklang Lyngton Thangkhiew joined as Assistant Professor at CSE department, IIT Guwahati.
  • 24.04.2024: Manju R. submitted her Ph.D thesis.
  • 04.04.2024: Paper by Sivakumar et al. accepted for publication in ACM-TODAES.
  • 01.04.2024: John Jose is nominated as chair, local organizing committee of IEEE ANTS conference 2024 to be held at IIT Guwahati.
  • 30.03.2024: Paper by Amit Puri et al. accepted for publication in 38th ACM SIGSIM-PADS 2024.
  • 23.02.2024: Amit Puri received an offer from AMD Bangalore as Senior Silicon Design Engineer.
  • 01.02.2024: John Jose is organizing INAE-SERB Pedagogy workshop on Teaching and Research during 15-16 March, 2024.
  • 04.02.2024: John Jose is re-appointed as the Vice Chair-Industry Academia Collaboration of IEEE India Council for the year 2024.
  • 13.01.2024: Paper by Rose Kunthara et al. accepted in World Scientific Journal of Circuits, Systems & Computers
  • 12.01.2024: Work submitted by Syam Sankar accepted in Ph.D Forum of DATE 2024 Valencia, Spain.

  • For more News and Updates Click Here.

Dr. John Jose works in the domain of multicore computer architecture. His research group in Multicore ARchitecture and Systems (MARS) Lab explore various cutting edge research problems in the following domain. An overview of MARS lab, its members and research works are briefed here. For more details about ongoing research click here.
  • Network on Chip (NoC) and Cache Optimisation in Tiled Chip Multi-Processors (TCMP)
  • Wireless On Chip Interconnects and Edge/Fog Computing
  • Machine Learning based Domain Specific Accelerators for NoCs
  • Non-Volatile Memory (NVM) Technology
  • Secure System on Chip Design Techniques
  • Disaggregated Memory Management in Data Center Architectures

Academic Profile
Ph.D Indian Institute of Technology Madras, Chennai, Tamil Nadu 2009-2014
M.Tech Vellore Institute of Technology, Vellore, Tamil Nadu 2004-2006
B.Tech College of Engineering Adoor, Cochin University, Kerala 1999-2003


Professional Experience
Associate Professor, CSE Department, IIT Guwahati, Guwahati. October 2021 till date
Assistant Professor, CSE Department, IIT Guwahati, Guwahati. July 2015 to October 2021
Assistant Professor, Rajagiri School of Engineering & Technology, Cochin. July 2013 to June 2015
Teaching & Research Assistant, CSE Department, IIT Madras, Chennai. January 2009 to June 2013
Assistant Professor, Viswajyothi College of Engineering and Technology, Muvattupuzha. June 2003 to December 2008