CS223 : Hardware Lab Jan 2013- Apr 2013

Instructor: Dr. A. Sahu

Course Structure:
Group structure of CS223 Group Structure & Marks
Assignments
  1. Experiment 1 (Weightage=10Marks): (Time 6 hour : Demo will be on 3rd Lab ( on 11th Jan 2013)) Demonstration of working of 4 bit ALU

    Demonstrate of working of 4 bit ALU Chip/IC, provide inputs from DIP of Breadboard and display the inputs and output in 7 Segment LED displays. Analyze type of functions (+, -, shift, or, and, ..etc ) can be implemented using the supplied/available ALU

    You are allowed to used BCD to 7-segment driver or Binary to 7 segment driver, ALU chips, register, MUX and any other components.

    Issue/Get all the required ICs from Hemanta Nath, Technical Superintendent of Hardware Lab.

    Submit a concise report (4 page maximum) on summarizing your design including block diagrams after the demonstration.

    Grade will be based on (a) Correctness, (b) Quality of design, (c) Wire optimization, (d) Optimum number of chip used, (e) Cleanliness in design (Wire and Chips should be organized to look good), (f) Use of proper Comment/Naming/Labeling of the wires and (g) Questionnaire and explanation.


  2. Experiment 2 (Weightage=25Marks): (Time=9 Lab hours, Date of Demo: 15 Feb 2013 (Before Mid Sem)) Design and Implement a 8 bit unsigned integer multiplier and demonstrate the functionality

    One method of multiplication is given bellow (you are allowed to discover/choose other methods like repeated additions, partial addition, etc):

    Block diagram and Pseudo-code to multiply two n bit number is given bellow.
    Suppose we want to multiply A (8 bits) and B (8 bits), and store result at S. So S is required to be 16 bit output. S have higher part SH and lower part SL . Initially place B in SL ( in C type operation s=0|B) and run the while loop of shifting S and increment i. S0 is right most bit and if it is set than add will be activated.

    In this, we require a n bit Adder/ALU, 2n bit S with Parallel IN/OUT/RightShift operations, and to do control we require a log(n) bit counter and a AND Gate.
    Some hints:
    1. 8 bit adder can be designed using two 4 bit adder/ALU
    2. 16 bit S register can be designed using 2 four bits PIPO shift register and one 8 bit SIPO (and-or one 8 bit PISO) register.
    3. Controller can be designed using a Modulo 8 Counter or 3 bit counter and an AND Gate
    4. You have to display result S (16 bit) onto two Seven Segment Display using 3 quad 2 input mux. Either you can use three bit (Octal) display format or 4 bit BCD fix garbage mode.
    5. Use 8 pack DIP switches to provide input to your Multiplier
    6. After you store B into SL you may required to deactivate inputs to B.
    7. For detail theory of multiplication you can read Multiplier algorithms from
    8. jatinga.iitg.ernet.in/~asahu/cs221/ or jatinga.iitg.ernet.in/~asahu/cs221/Lects/Lec27.pdf

  3. Experiment 3 (Weightage=20Marks): (6 Hour, Date of Demo extended to 15 Mar 2013, (5 mark bonus for demo on 8th March )) Storing data to memory and Implement a data accumulator hardware (for_i S=S+M[i])
    Both Part I and Part II need to be demonstrated simultaneously.


    Part I: Store N 4 bit data to RAM Chip (of Breadboard) from PC. Design the interfacing circuit using PC parallel port to transfer data from PC to memory RAM Chip IC2114.

    One method to download data from PC to memory is given bellow (you are allowed to used any other method):
    1. A clock is generated at D1 of PC parallel port and every clock period a data bit is available at D0 of parallel port
    2. Every 4 clock cycle a 4 bit word will be accumulated and stored in to a SIPO register.
    3. Write the generated 4 bit word to memory and increment the MAR. (Memory Address Register)
    4. MAR can be composed of two 4 bit register/counter. (as N greater than 15)

    One can write a C program to transfer HEX file to output data in parallel port according to Step 1. (Sample program is given in bellow web-link)
    C Code for Data sending through Parallel-Port and Sample input file


    Part II: Read 15 data (4 bit each) from memory, add them and display the result to LEDs (two 7 Segs or on board 8 LEDs)

    Assume the data are stored a in sequence (starting from 0) of memory location of 1K x 4 bit RAM. You need to fetch data one by one and add to accumulator A.

    You require to use two 4 bit bus and out of one is data bus other is address bus. Multiple people read from the BUS simultaneously but only one should write to BUS at a time.


    FSM Steps

    Step 1: A=0; // Clear Ac=1;
    Step 2: UCTR=0;
    Step 3: while (UCTR<16 or check CTR not carry) {
    Step 5:    T=M[UCTR]; // Mout=1; Tin=1; UCTRout=1;
    Step 6:    S = A +T; if (A > 15) AH++; // AHC=1, ADD=1, Sin=1;
    Step 7:     A = S; UCTR++; // UC=1, Sout=1, Us=1; Ds=1;
                  }
    Sept 8: LEDOut1=A; // Min=1; Aout=1; UCTRout=1; LEDout1=1;
    Step 9: LEDout2=AH; // Min=1; AHout=1; UCTRout=1; LEDout1=1;

    Some hints:
    (1) 4 bit adder can be used. if (carry) AH++ : can be implemented using a counter with carry as pulse
    (2) Memory is 1K x 4 bit RAM, so 10 address line, only last 4 address lines are sufficient to implement this.
    (3) When memory read is on, and M2DBin is on, Data of memory location pointed by address bus will be available in the Data bus.


  4. Experiment 4 ((Weightage=45Marks)): (Date of announcement: 8th March 2013, Timing: 12 Hour, Date of Demo: on or before 12 Apr 2013) Design and Implementation of 4 bit CPU Block diagram of sample processor is given figure. We generally use standard names for purposes and these names are (a) PC (Program Counter), (b) MAR (Memory Address Register), (c) ACC (Accumulator), (d) SP (Stack Pointer), (e) TS (Tristate buffer), and etc.
    Instructions need to support and some example case is given bellow :
    Instruction Format Meaning
    1 Start Start Starting of Program
    2 Halt Halt Termination of Program
    3 ADD ADD ADDRESS ACC=ACC+M[ADDRESS], Address is 2 byte (8 bit), So it is a 3 byte instruction
    4 SUB ADD ADDRESS ACC=ACC-M[ADDRESS]
    5 AND ADD ADDRESS ACC=ACC AND M[ADDRESS]
    6 JMP JMP ADDRESS PC=ADDRESS
    7 JNZ JNZ ADDRESS if (ACC!=0) PC=ADDRSS//if ALU zero flag!=0
    8 LOAD LOAD ADDRESS ACC=M[ADDRESS]
    9 STORE STORE ADDRESS M[ADDRESS]=ACC
    10 CALL CALL ADDRESS STACK[SP++]=PCH, STACK[SP++]=PCL PC = ADDRESS;
    11 RETURN RETURN PCL=STACK[SP--] PCH=STACK[SP--] ;
    12 SCAN SCAN ACC=I/O Port (4 bit DIPs) ;
    13 PRINT PRINT I/O Port (one 7 Seg Display ) = ACC ;
    14 MOVT2A MOVT2A ACC=TEMPREG (T) ;
    15 MOVA2T MOVA2T TEMPREG (T) =ACC ;
    16 RESERVE RESERVE Reserve for Future purpose ;


    You are allowed to choose any Opcode for any instructions.
    You can design the circuit with micro-instruction control or FSM/hardwired control (which clock cycle what micro‐operations). As you know, each instruction can be divided in micro-operation or micro instruction. Lets take an example: ADD operation can be divided into 4 sub operations (a) reading Higher order ADDRESS and putting into MARH, (b) reading Lower order Address and Put into MARL, (c) Reading data from Memory M[MAR], and (d) Adding operation and storing into ACC.

    You should be able to run two program (a) multiplications of two number and display the result at LEDS (b) recursive sum up to N (SUM N=N+SUM(n‐1) till N==0).

    Download 4 bit version of desired program to memory RAM Chip IC2114 (of Bread board) from Personal Computer and execute the downloaded program. Sample Assembly Language Programming & HEX codes Program 1 Sample Assembly Language Programming & HEX codes Program 2 Sample Assembly Language Programming & HEX codes Program 3 Sample Assembly Language Programming & HEX codes Program 4
    Submit a 10 pages document at the time of demonstration.
Lab Class timing, Venue and Rules