Courses Offered

Ph.D. Students continuing

• Sisir Kumar Jena
• Nanu Alan Kachari
• Anand Kamal
• Kunwer Mrityunjay Singh

M.Tech. Students Ongoing

• VUDATHA VENKATA NARENDRA

Ph.D. Students Completed

• Supervisors: Jatindra Kr. Deka, Santosh Biswas ⋄ Scholar Name: Mousum Handique ⋄ Thesis Title: Test Pattern Generation and Fault Localization for some Fault Models in Reversible Circuits
• Supervisors: Jatindra Kr. Deka, Santosh Biswas ⋄ Scholar Name: Biswajit Bhowmik ⋄ Thesis Title: Performance-Aware Test-Time Optimization Schemes of Analysis of Logic Level Faults in Channels of On-Chip Networks.
• Supervisors: Jatindra Kr. Deka, Sukumar Nandi ⋄ Scholar Name: Rajendra Pamula ⋄ Thesis Title: Data Pruning Based Outlier Detection

M.Tech. Students Completed

• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: Mohit Pal ⋄ Thesis Title: "Implementation of Early Exit Neural Network On FPGA"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: ANKIT KUMAR JATIYA ⋄ Thesis Title: "Centralized Approach for Roundabout Management for Autonomous Vehicles"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: RAJAT SINGH ⋄ Thesis Title: "Outlier Detection in High Dimensional Data"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: BORGE ABHISHEK JAIPRAKASH ⋄ Thesis Title: "Energy Efficient in IoT using RPL Protocol"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: RAHUL SHARMA ⋄ Thesis Title: "ESOP based Shared Cube Synthesis of REVERSIBLE Circuits"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: ANKUSH PATEL ⋄ Thesis Title: "Clustered based Hybrid Task Partitioning in Multiprocessor Systems"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: MARPINA BHARGAVA ⋄ Thesis Title: "Job Scheduling in Multiprocessor System With Prereservation"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: HARSHIT AWASTHI ⋄ Thesis Title: "Routing in Cluster Mesh With Hierarchy of NOC"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: RUSHIRAJ PARSOTAMBHAI PATEL ⋄ Thesis Title: "Test Case Generation Using Model Checking"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: HEMANT ANARE ⋄ Thesis Title: "Issue of Routing in Tree Based NoC's"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: ASHISH KUMAR SHUKLA ⋄ Thesis Title: "Testing Web Applications Using UML Diagram"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: KULLAI REDDY MEKA ⋄ Thesis Title: "Demand Based Routing in Network-on-Chip (NoC)"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: MS. BINDU AGARWALLA ⋄ Thesis Title: "Dynamic Task Allocation in NOC"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: AJEET KUMAR SINGH ⋄ Thesis Title: "TPW: A Transport Protocol for Wireless Mesh Networks using Active Bandwidth Measurement"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: GOLLA VEERA SEKHAR BABU ⋄ Thesis Title: "Connectivity Based Dual Vdd for Low Power FPGA"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: RAMESH BABU BATTULA ⋄ Thesis Title: "A Hybrid Routing Protocol for Wireless Mesh Network"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: REJOY V.M ⋄ Thesis Title: "AN AREA EFFICIENT TECHNOLOGY MAPPING ALGORITHM FOR FPGA"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: MR. SUNIL KUMAR CHOWDHARY ⋄ Thesis Title: "Formal Modelling of Impact of HIV on T-Cell"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: CH. MALLIKARJUNA RAO ⋄ Thesis Title: "Specification and Verification of Key Exchange Protocols"
• Supervisors: Jatindra Kumar Deka, Shivashankar B. Nair ⋄ Scholar Name: MR. HARENDRA SINGH SOLANKI ⋄ Thesis Title: "Enabling Mobile devices for the Visually Challenged"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: R. CHANDRA SEKHAR RAO ⋄ Thesis Title: "Specification and verification of Network Time Protocol"
• Supervisors: Shivashankar B. Nair, Jatindra Kumar Deka ⋄ Scholar Name: SUNIL ANCHIPAKA ⋄ Thesis Title: "Enabling Net Access for Mobile Devices"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: K. VINAY KUMAR ⋄ Thesis Title: "Formal Verification of Ad-hoc Network Protocals"
• Supervisor: Jatindra Kumar Deka ⋄ Scholar Name: THATI VIKRANTH ⋄ Thesis Title: "Specification and Verification of Distributed Web ServicesTransaction Protocol "

Sponsored Research Projects

Project Title: "Computer Science for High School (CS4HS)"
PI: Dr. J. K. Deka
Funding Agency: Google
Start Year: 2015
End Year: 2016

Project Title: "On Line Testing of Complex VLSI Circuits using FDD Theory of Discrete Event system"
PI: Dr. Santosh Biswas
Co-PI: Dr. J.K. Deka, Prof. S. Nandi
Funding Agency: DeitY
Start Year: 2013
End Year: 2017

Project Title: "Pedagogy Research Project - Main Phase"
PI: Prof. J. K. Deka
Funding Agency: MHRD
Start Year: 2013
End Year: 2017

Project Title: "Remote triggered digital system laboratory"
PI: Dr. J.K. Deka, Dr. Santosh Biswas, Dr. Arijit Sur
Funding Agency: MHRD
Start Year: 2012-2013

Project Title: "Pedagoggy Research Project - Pilot Phase"
PI: Prof. J. K. Deka
Funding Agency: MHRD
Start Year: 2009
End Year: 2013

Project Title: "An assistive computer user interface for the visually challenged"
PI: Dr. J. K. Deka, Dr. S. B. Nair, Dr. P. K. Das
Funding Agency: MSJE
Start Year: 2007-2008
End Year: 2009

Project Title: "A testbed for Mobile e-learning System"
PI: Prof. S. Nandi
Co-PI: Dr. H. S. Paul, Prof. D. Goswami, Dr. J. K. Deka, Dr. S. V. Rao
Funding Agency: Hewlett Packard, US
Start Year: 2007-2008
End Year: 2010

Publications

• Kunwar Mrityunjoy Singh, Jatindra Kumar Deka, Santosh Biswas, "Incomplete Testing of SOC", "Journal of Electronic Testing Theory and Application", 39, 387 -402, June, Link, 2023

• Mousum Handique, Jatindra Kumar Deka, Santosh Biswas, "Fault Localization Scheme for Missing Gate Faults in Reversible Circuits", "ACM Transactions on Design Automation of Electronic Systems", Vol. 27, No. 4, 1 - 29, March, Link, 2022

• Kunwer Mrityunjay Singh, Santosh Biswas, Jatindra Kumar Deka, "ATPG for Incomplete Testing of SOC Considering Bridging Faults", IEEE REGION TEN CONFERENCE (TENCON 2021), 7 - 10, December, 2021

• Mousum Handique, Jatindra Kumar Deka, Santosh Biswas, "A Fault Diagnosis Technique of SMGFs in k-CNOT Based Reversible Circuits", IEEE REGION TEN CONFERENCE (TENCON 2021), 7 - 10, December, 2021

• Nanu Alan Kachari, Santosh Biswas, Jatindra Kumar Deka, "FOSS conversion of Virtual Lab Experiments: A Case Study of Virtual Labs by NMEICT", IEEE TALE 2021, 05 - 08, December, 2021

• Sisir Kumar Jena, Santosh Biswas, Jatindra Kumar Deka, "Retesting Defective Circuits to Allow Acceptable Faults for Yield Enhancement", " Journal of Electronic Testing Theory and Applications", 37, 633 - 652, December, Link, 2021

• Mousum Handique, Jatindra Kumar Deka, Santosh Biswas, "Detection of Stuck-at and Bridging Fault in Reversible Circuits Using an Augmented Circuit", Asian Test Symposium, ATS-2021, 22 - 24, November, 2021

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Selective Fault-Masking for Improving Yield and Performance of On-Chip Networks", IEEE International Conference on System, Man and Cybernatics, SMC-2021, 17 - 20, October, 2021

• Mousum Handique, Jatindra Kumar Deka, Santosh Biswas, "A Fault Detection Scheme for Reversible Circuits Using -Ve Control K-CNOT Based Circuit", IEEE REGION TEN CONFERENCE (TENCON - 2020), 16 - 19, November, 2020

• Sisir Kumar Jena, Santosh Biswas, Jatindra Kumar Deka, "Maximizing Yield through Retesting of Rejected Circuits Using Approximation Technique", IEEE REGION TEN CONFERENCE (TENCON 2020), 16 - 19, November, 2020

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Reliability Monitoring in a Smart NoC Component", ICECS 2020 - The 27th IEEE International Conference on Electronics Circuits and Systems, 23 - 25, November, 2020

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "Test Methodology for Analysis of Coexistent Logic-Level Faults in NoC Channels", 2020 IEEE International Conference on System, Man and Cybernetics, Toronto, Canada, 11 - 14, October, 2020

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Improving Reliability in Spidergon Network on Chip-Microprocessors", 63rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2020), 09 - 12, August, 2020

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B. Bhattacharya, "Locating Open-Channels in Octagon Networks on Chip-Microporocessors", IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2020), 6 -8, July, 2020

• Sirir Kumar Jena, Santosh Biswas, Jatindra Kumar Deka, "Approximate Testing of Digital VLSI Circuits usingError Significance based Fault Analysis", 24th International Symposium on VLSI Design and Test (VDAT 2020), 23 - 25, July, 2020

• Mousum Handique, Jatindra Kumar Deka, Santosh Biswas, "An Efficient Test Set Construction Scheme for Multiple Missing-Gate Faults in Reversible Circuits", "Journal of Electronic Testing Theory and Application", Volume 36, Issue 1, 105 - 122, February, Link, 2020

• Sisir Kumar Jena, Santosh Biswas, Jatindra Kumar Deka, "Systematic Design of Approximate Adder Using Significance Based Gate-Level Pruning (SGLP) for Image Processing Application", 8th International Conference, PReMI 2019, Tezpur, India, Part-II, 561-570, 17th - 20th, December, Link, 2019

• Mousum Handique, Santosh Biswas, Jatindra Kumar Deka, "Test Generation for Bridging Faults in Reversible Circuits Using Path-Level Expressions", "Journal of Electronic Testing Theory and Application", Volume 35, Issue 4, 441-457, August, Link, 2019

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B Bhattacharya, "A Low-Cost Test Solution for Reliable Communication in Networks-on-Chip", "Journal of ElectronicTesting Theory and Application", Volume-35, Issue-2, 215 - 243, April, Link, 2019

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, Bhargab B Bhattacharya, "Performance-Aware Test Scheduling for Diagnosing Coexistent Channel Faults in Topology-Agnostic Networks-on-Chip", "ACM Transactions on Design Automation of Electronic Systems (TODAES)", Volume - 24, Issue - 2, February, Link, 2019

• Biswajit Bhowmik, Jatindra Kumar Deka and Santosh Biswas, "On-Line Analysis of Stuck-at Faults in On-Chip Network Interconnects", "Journal of Circuits, Systems and Computers", Volume 27, Number 13, December, Link, 2018

• Kunwer Mrityunjay Singh, Santosh Biswas, Jatindra Kumar Deka, "ATPG for Incomplete Testing of SoC and Power Aware TAM Architecture", IEEE Conference Indicon 2018, 16-12-2018 to 18-12-2018, December, Link, 2018

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B Bhattacharya, "Reliability-Aware Test Methodology for Detecting Short-Channel Faults in On-Chip Networks", "IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS", Volume 26, Number 6, 1026 - 1039, June, Link, 2018

• Sanjay Jyoti Dutta, Nanu Alan Kachari, Jatindra Kumar Deka, Santosh Biswas, "Remote Triggered Digital System Laboratory A case study on Digital System ", 3rd International Conference for Convergence in Technology (I2CT), Pune, India, April, 2018

• M. Handique, J. K. Deka, S. Biswas and K. Dutta, "Minimal Test Set Generation for Input Stuck-at and Bridging Faults in Reversible Circuits", IEEE TENCON 2017, Penang, Malaysia, 5 - 8 , November, 2017

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "A Time-Optimized Scheme Towards Analysis of Channel-Shorts in on-Chip Networks", "Journal of Electronic Testing Theory and Application", Volume 33, Issue 2, 227 - 254, April, Link, 2017

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "CHARKA: A Reliability-Aware Test Scheme for Diagnosis of Channel Shorts Beyond Mesh NOCs", Design, Automation and Test in Europe, DATE-2017, The European Event for Electronic System Design and Test, Lausanne, Switzerland, 27 - 31, March, 2017

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "A Reliability-Aware Topology-Agnostic Test Scheme for Detecting, and Diagnosing Interconnect Shorts in on-Chip Networks", The 18th IEEE International Conference on High Performance Computing and Communications (HPCC 2016), Sydney, Australia, 12-14, December, 2016

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "When Clustering Shows Optimality Towards Analyzing Stuck-at Faults in Channels of on-Chip Networks ", The 18th IEEE International Conference on High Performance Computing and Communications (HPCC 2016), Sydney, Australia, 12-14, December, 2016

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "On-line Testing of Coexistent Stuck-at and Open Faults in NoC Interconnects", IEEE TENCON - 2016, Singapore, 157 - 162, 22 - 25, November, 2016

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "A Concurrent Approach to Detect and Diagnose Shorts in Interconnects of on-Chip Networks", IEEE TENCON - 2016, Singapore, 2420 - 2425, 22 - 25, November, 2016

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, Bhargab B. Bhattacharya , "A Topology-Agnostic Test Model for Link Shorts in On-Chip Networks", 2016 IEEE International Conference on Systems, Man, and Cybernetics • SMC 2016 • Budapest, Hungary, 4561-4566, 9-12, October, 2016

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, Bhargab B. Bhattacharya, "On-Line Detection and Diagnosis of Stuck-at Faults in Channels of NoC-based Systems", 2016 IEEE International Conference on Systems, Man, and Cybernetics • SMC 2016 • Budapest, Hungary, 4567-4572, 9-12, October, 2016

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B. Bhattacharya, "Detecting and Diagnosing Open Faults in NoC Channels on Activation of Diagonal Nodes", 2016 IEEE International Conference on Systems, Man, and Cybernetics • SMC 2016 • Budapest, Hungary, 4573-4578, 9-12, October, 2016

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B. Bhattacharya, "One Poison is Antidote Against Another Poison", 2016 IEEE International Conference on Systems, Man, and Cybernetics • SMC 2016 • Budapest, Hungary, 4579-4584, 9-12, October, 2016

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Towards a Scalable Test Solution for the Analysis of Interconnect Shorts in on-Chip Networks", IEEE Conference on Modelling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS-2016), Imperial College, London, UK, 19-21, September, 2016

• B.Bhowmik, J.K.Deka, S.Biswas, "An On-Line Test Solution for Addressing Interconnect Shorts in on-Chip Networks", 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS-2016), Catalunya, Spain, 4 - 6, July, 2016

• B.Bhowmik, S.Biswas, J.K.Deka, "An Odd-Even Scheme to Prevent a Packet from Being Corrupted and Dropped in Fault Tolerant NoCs", 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS-2016), Catalunya, Spain, 4 - 6, July, 2016

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "Impact of NoC Interconnect Shorts on Performance Metrics", 22nd National Conference on Communication (NCC-2016), IIT Guwahati, India, 04 - 06, March, 2016

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "An Odd-Even Model for Diagnosis of Shorts on NoC Interconnects", 2015 IEEE 12th India International Conference (IEEE INDICON 2015), New Delhi, 17-20, December, 2015

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "A Matrix Model for Redefining and Testing NoC Interconnect Shorts", 2015 IEEE 27th Asia Pacific Region Ten Conference (IEEE TENCON 2015), Macau. [Winner of Young Scientist Award]. , 1-4, November, 2015

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Reliability on Top of Best Effort Delivery: Maximal Connectivity Test on NoC Interconnects", 2015 ACM 8th Annual India Conference (ACM COMPUTE 2015), Ghaziabad, 29 - 31, October, 2015

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "An Optimal Diagnosis of NoC Interconnects on Activation of Diagonal Routers", 2015 IEEE 28th International Conference on Systems, Man, and Cybernetics (IEEE SMC 2015), Hong Kong, 9-12, October, 2015

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Directed Symbolic Execution for VLSI Circuits", 2015 IEEE 28th International Conference on Systems, Man, and Cybernetics (IEEE SMC 2015), Hong Kong, 9-12, October, 2015

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "A Packet Address Driven Test Strategy for Stuck-at Faults in Networks-on-Chip Interconnects", 2015 IEEE 23rd Mediterranean Conference on Control and Automation (MED 2015), Torremolinos, Spain, 16-19, June, 2015

• Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, "Crossing Register Transfer Level for VLSI Circuits", International Conference on Industrial Instrumentation and Control (ICIC 2015) 2015, Pune, Maharashtra, India, 28-30, May, 2015

• Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas, "Beyond Test Pattern Generation: Coverage Analysis", International Conference on Industrial Instrumentation and Control (ICIC 2015) 2015, Pune, Maharashtra, India., 28-30, May, 2015

• B. Bhowmik, S. Biswas, J. K. Deka, "Detection of Faulty Interswitch Links in 2-D Mesh Network-on-Chips", in proc. of the  8th IEEE International Conference on Advanced Networks and Telecommunication Systems (IEEE ANTS 2014), New Delhi, India, 14-17, December, 2014

• R. Pamula, J. K. Deka, and S. Nandi, "An Outlier Detection Method Based on Cluster Pruning", Second International Conference on Business & Information Management (IEEE ICBIM-2014), pp.138-141, December, 2014

• R. Pamula, J. K. Deka, and S. Nandi, "Pruning based method for outlier detection", Third International Conference on Emerging Applications of Information Technology (IEEE EAIT-2012), Kolkata, India 2012, pp. 210-213, December, 2014

• R. Pamula, J. K. Deka, and S. Nandi, "Centroid Based Cluster Pruning Outlier Detection Method", "International Journal of Systems, Algorithms and Applications", Volume-3, pp. 2277-2677, March, 2013

• A. K. Singh and J. K. Deka, "A Study of Bandwidth Measurement Technique in Wireless Mesh Networks", "International Journal of Ad hoc, Sensor and Ubiquitous Computing, September 2011", Vol-2, No.-3, September, 2011

• G. V. Sekhar and J. K. Deka, "Connectivity Based Dual Vdd Assignment Algorithm for Power Reduction in FGPA", Proceedings of the 2011 International Conference on Embedded Systems and Applications, Las Vegas, USA, 18-21, July, 2011

• K. M. Reddy and J. K. Deka, "Demand Based Routing in Network-on-Chip (NoC)", Proceedings of the 2011 International Conference on Embedded Systems and Applications, Las Vegas, USA, 18-21, July, 2011

• A. K. Singh and J. K. Deka, "Bandwidth Probe: An End-to-End Bandwidth Measurement Technique in Wireless Mesh Networks", Proceedings of the 3rd International Conference on Wireless, Mobile Networks and Application Dubai, UAE, 25-27, May, 2011

• B. Aggrawal and J. K. Deka, "Dynamic Task Allocation in Network-on-Chip", Proceedings of the 3rd International Conference on Wireless, Mobile Networks and Application, , Dubai, UAE, 25-27, May, 2011

• R. Pamula, J. K. Deka and S. Nandi, "An Outlier Detection Method Based on Clustering", Proceeding of International Conference on Emerging Applications of Information Technology (IEEE EAIT 2011), Kolkata, , February, 2011

• R. Pamula, J. K. Deka and S. Nandi, "Distance Based Fast Outlier Detection Method", Proceeding of the International Conference IEEE INDICON December 2010, Kolkata, December, 2010

• Ramesh Babu Buttala, Srikant Vemiru, Rajashekhar Rao Kurra, Pavan Kumar Tummal, Jatindra Kumar Deka, "On-Demand Table-Driven Topo-Aware Routing Protocol for Wireless Mesh Networks", "Recent Trends in Networks and Communications, the series of Communications in Computer and Information Science, Springer", 90, 296-305, July, 2010

• A.Khan, K.Misra, S. Biswas, J. K. Deka, H. Kapoor, "Fair Diagnosability in PN-based DES Models", IEEE international Conference of Control and Automation 2010, Xiamen, China (IEEE Press) , pp. 2116-2171, May, 2010

• V. Chennareddy and J. K. Deka, "Formally Verifying the Distributed Shared Memory Weak Consistency Models", Proceedings of 14th International Conference on Advanced Computing and Communication, Surathkal, December, 2006

• M. Riba and J. K. Deka, "Variable Ordering of BDDs using Genetic Algorithm", Proceedings of 2nd Indian International Conference on Artificial Intelligence, Pune, India, 20-22, December, 2005

• V. Kumar and J. K. Deka, "Organizing UML Class Diagrams in Layers", In Proceedings of 3rd International Conference of Information and Communication Technology (ICICT 05), Cairo, Egypt., 4-5, May, 2005

• J. K. Deka and A. Jha, "An In-Memory Algorithm for Efficient Processing of On-Line Analytical Processing (OLAP) Queries", In Proceedings of 6th International Conference on Information Technology (CIT 2003), Bhubaneswar, India, pp. 461-467, 22-25 , December, 2003

• J. K. Deka, "Reasoning about extremal properties of events", In Proceedings of 10th International Symposium on Temporal Representation and Reasoning and 4th International Conference on Temporal Logic (TIME-ICTL 03), Cairns, Australia, pp. 163-180, 8-10, July, 2003

• J. K. Deka and A. Das, "Application of Internet and E-Learning", In Proceedings of Information Technology: Prospects and Challenges in the 21st Century, International Conference (ITPC-2003), Kathmandu, Nepal, pp. 67-72, 23-26, May, 2003

• J. K. Deka, P. Dasgupata and P. P. Chakraborty, "Min-max Event-triggered Computation Tree Logic", "Sadhana, Special Issue on Formal Verification of Circuits and System, Journal of Indian Academy of Science", Vol. 27, Part 2,, pp. 163-180, April, 2002

• J. K. Deka, S. Chaki, P. Dasgupta and P. P. Chakraborty, "Abstractions for Model Checking of Event Timings", In Proceedings of IEEE International Symposium on Circuits and Systems, Sydney, Australia, Vol-V, pp. 125-128, 6-9, May, 2001

• S. Sriram, J. K. Deka, P. Dasgupta and P. P. Chakraborty, , "Min-max Computation Tree Logic", "Artificial Intelligence", 127, pp. 137-162,, March, 2001

• J. K. Deka, P. Dasgupta and P. P. Chakraborty, "A Comparative Analysis of BDD-based and RULE-based Reachability Problems for Cellular Automata", In Proceedings of International Conference of Computer Communication and Devices 2000, I.I.T., Kharagpur, India, Vol-I, 14-16, December, 2000

• J. K. Deka, P. Dasgupta and P. P. Chakraborty, "Model Checking on Timed Event Structures", "IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems", Volume 19, Number 5, pp. 601-611, May, 2000

• J. K. Deka, P. Dasgupta and P. P. Chakraborty, "An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays", pp. 294-299, 7-10, January, 1999

Books/Book Chapters

• Jatindra Kumar Deka, Santosh Biswas, "Computer Organization and Architecture - A Pedagogical Approach"", Video Course, 3, MHRD, India, Developed under Pedagogy Reseach Project, under NMEICT of MHRD, GOI, 2016

• Jatindra Kumar Deka, Santosh Biswas, "Design Verification and Test of Digital VLSI Circuits"", Video Course, 5, MHRD, India, Developed under NPTEL Project, MHRD, GOI, 2013

• Jatindra Kumar Deka, Santosh Biswas, "VLSI Design Verification and Test"", Web Course, 6, MHRD, India, Developed under NPTEL Project, MHRD, GOI, 2012

• Jatindra Kumar Deka, "Computer Organization and Architecture"", Web Course, 6, MHRD, India, Developed under NPTEL Project, MHRD, GOI, 2007

Recognitions

• Best Paper Award, IEEE TENCON 2017, Penang, Malaysia

• Best Paper Award, IEEE TENCON 2015, Macau, China

• Best paper award in the second international conference on business and information management

• Best paper award in the second international conference on Recent advances in Engineering and Technology

• INRIA Lorraine, LORIA, Nancy, France; Short Visit, Post Doctoral Fellowship, May-July 2004

Other Activities

Tutorial

• October 2011, Embedded Systems and Formal Methods, International Conference on Computer and Communication Technology (ICCCT-2011), October 2011, Motilal Nehru National Institute of Technology, Allahabad

Keynote Talk

• 22 and 23 December 2017, Orientation Workshop for Start-up Cell Coordinator, TEQIP-III Institutions, jointly organized by NPIU and AICTE, hosted by CET, IIT Guwahati

Invited Talk

• 06 - 07 October 2016, Education Technology - Pedagogy, E-Learning and Others, International Conference on Information Technology (InCITe-2016), Amity University, Noida, Delhi, India

• 24-25 July, 2015, Pedagogical Issues and Outcome Based Learning, 2-Day Workshop on Institutional Management and Brain Storming Session on the future direction of Polytechnic Education in North East states of India, organized by NITTTR, Kolkata

• 12 June 2015, Entrepreneurship opportunities for Budding Entrepreneur, Seminar on Innovative Research and Entrepreneurial Opportunities in Biotechnology, organized by Guwahati Bio-Tech Park, Guwahati

• 7-8 March, 2014, Design Issues of Embedded System, National Conference on Emerging Global Trends in Engineering and Technology 2014, Don Bosco College of Engineering and Technology, Guwahati, Assam

• May 2013, Embedded System Design with HDL, Workshop on Advanced Computer Architecture and Embedded Systems, University Institute of Technology, Rajiv Gandhi Proudyogiki Vishwavidyalaya, Bhopal, India, May 2013

• March 2012, Formal Methods for Design Verification, International Conference on Recent Advances in Information Technology (RAIT-2012), ISM, Dhanbad, India, March 2012

• 05 May 2017, Pedagogy - Outcome Based Learning, in Two day Workshop on Pedagogy, organized by Assam Engineering College, Jalukbari, Assam

Guest Speaker

• 28 October 2018, Education Summit organized by Kalinga Institute of Industrial Technology, Bhubaneswar

• 16 November 2018, IT Summit-2018, Organized by Oil India Limited, Duliajan, Assam

Event Organized

• 24-27 May, 2016, Finance Chair, 20th International Conference on VLSI Design and Test (VDAT-2016) at IIT Guwahati

• 09 Janury 2016, One-day workshop on Outcome Based Learning for Introduction to Computing at Manipur University, Imphal, Manipur under Google CS4HS Award Programme

• 23 January 2016, One-day workshop on Outcome Based Learning for Introduction to Computing at Assam University, Silchar, Assam under Google CS4HS Award Programme

• 20 February 2016, One-day workshop on Outcome Based Learning for Introduction to Computing at Rangia College, Rangia Assam under Google CS4HS Award Program

• 27 February 2016, One-day workshop on Outcome Based Learning for Introduction to Computing at Dibrugarh University, Dibrugarh, Assam under Google CS4HS Award Programme

• 07 May 2016, One-day workshop on Outcome Based Learning for Introduction to Computing at Jorhat Engineering College, Jorhat Assam under Google CS4HS Award Programme

• 07 November 2015, One-day workshop on Outcome Based Learning for Introduction to Computing, Jawaharlal Nehru College, Boko, Kamrup, Assam, under Google CS4HS Award Programme

• 28 November 2015, One-day workshop on Outcome Based Learning for Introduction to Computing, at North East Hill University, Shillong, Meghalaya, under Google CS4HS Award Programme

• 19 December 2015, One-day workshop on Outcome Based Learning for Introduction to Computing, Tezpur University, Tezpur, Assam, under Google CS4HS Award Programme

• 29-AUGUST-2015, Seminar on Thinking Social at IIT Guwahati in association with Tata Social Enterprise Challange and IIM Calcutta Innovation Park

• 15 - 16 November 2013, Regional Workshop for Curriculum Development using pedagogical methodologies at IIT Guwahati

• 15-19 December 2012, Organizing Co-Chair, 8th International Conference on Information System Security, (ICISS-2012) at IIT Guwahati

• November 2010, Workshop on Embedded System, St. Anthony College, Shillong, India

• 8 - 12 June 2009, Coordinator, AICTE Sponsored QIP Short Term Course on "VLSI Design, Verification and Test" at IIT Guwahati

• 18 - 21 December 2007, Organizing Chair, 15th International Conference on Advanced Computing and Communication (ADCOM-2007) at IIT Guwahati

• 27-30 December 2006, Finance Chair, 8th International Conference on Distributed Computing and Networking (ICDCN-2006) at IIT Guwahati

• 19 October 2016, Organized IITG-TIC Innovation Competion

• 19 January 2017, Organized Workshop for OIL supported start-up

Institute Responsibilities

Official Post

• June 2020, Head of the Department, Computer Scence and Engineering Department

• June 2020 and continuing, Chairman, Department Post Graduate Programme Committee

• June 2020 and continuing, Chairman, Department Undergraduate Programme Committee

Official Engagement

• February 2015 to October 2017, Faculty In-charge, IITG-TIC (Technology Incubation Center)

• July 2008 - October 2010, Chairman, Cultural Board, Student Gymkhana, IIT Guwahati

• 2017 - 2018, Vice Chairman, JEE ADVANCED 2018

Committee Member

• June, 2015 to 15 October 2017, Member, Institute Post-Graduate Programme Committee (IPPC), IIT Guwahati

• July 2013 to December 2017, External Member, Department Under Graduate Program Committee (DUPC), Mathematics Department, IIT Guwahati

• July 2012 - June 2015, External Member, Department Under Graduate Program Committee (DUPC), Mechanical Engineering Department, IIT Guwahati

• July 2010 - January 2013, Member, Institute Under-Graduate Programme Committee (IUPC), IIT Guwahati

• January 2005 - December 2007, Member, Institute Under-Graduate Programme Committee (IUPC), IIT Guwahati

• July 2005 - June 2009, External Member, Department Under Graduate Program Committee (DUPC), ECE Department, IIT Guwahati

Department Responsibilities

Official Engagement

• June 2015 to 15 October 2017, Secretary, Department Post-Graduate Programme Committee (DPPC), CSE Department, IIT Guwahati

• July 2010 - January 2013, Secretary, Department Under-Graduate Programme Committee (DUPC), CSE Department, IIT Guwahati

• January 2005 - December 2007, Secretary, Department Under-Graduate Programme Committee (DUPC), CSE Department, IIT Guwahati

Committee Member

• July 2012 - July2014, Member, Post-Graduate Admission Committee, CSE Department, IIT Guwahati

• July 2010 - January 2013, Member, Department Post-Graduate Programme Committee (DPPC), CSE Department, IIT Guwahati

• January 2005 - December 2007, Member, Department Post-Graduate Programme Committee (DPPC), CSE Department, IIT Guwahati

• 16 October 2017 to 14 June 2020, Member, Department Post-Graduate Programme Committee (DPPC), CSE Department, IIT Guwahati