INTERNATIONAL WORKSHOP on

Embedded System Technologies for Deep Learning and Approximate Computing

(Under the SPARC Project P:271 - 'Approximate Computing Techniques for Resource Constrained Edge Devices')

29 - 30 May & 5 - 6 June, 2021


Latest Updates:
Recorded Videos and Lecture Slides [updated on 20.06.2021]
Final List of Attendees for which E-certificates are issued [updated on 23.06.2021]
Final List of Confirmed Candidates for which login details are sent [updated on 28.05.2021]
For any queries, send an email to sparc.cse.iitg@gmail.com mentioning your Reg ID and the name.

Workshop Brochure. || Application Registration Form (Last date: 26.05.2021). REGISTRATION CLOSED !

About the Workshop

An embedded system is a microprocessor-based computer hardware system with software designed to perform a dedicated function, either as an independent system or as a part of an extensive system. From mp3 players to security systems, embedded systems are an integral part of our daily life. With the increasing popularity of IoT devices, embedded devices are becoming more and more sophisticated. Researchers across the globe are trying to come up with superior hardware architectures and integrate new technologies to meet today's technological demand. Ever since the release of intel 4004 in 1971, the industry for embedded systems proliferating, driven by the continued development of Artificial Intelligence (AI), Virtual Reality (VR) and Augmented Reality (AR), machine learning, deep learning, and the Internet of Things (IoT). We need embedded system architectures that have reduced energy consumption, improved security, cloud connectivity, deep learning applications, and visualization tools with real-time data. This workshop will discuss basic architecture to state-of-the-art deep learning and approximate computing concepts in the embedded systems domain.

Approximate computing is an emerging design paradigm that enables highly efficient hardware and software implementations by exploiting the inherent resilience of applications to in-exactness in their computations. Taking approximate computing closer to mainstream adoption requires (i) a deeper understanding of inherent application resilience across a broader range of applications (ii) tools that can quantitatively establish the inherent resilience of an application, and (iii) methods to quickly assess the potential of various approximate computing techniques for a given applicationctures and interactive discussion sessions, which will cover a wide variety of solutions related to design-for-security as well as SoC security validation techniques to ensure security and trustworthiness of SoCs. This workshop will touch upon basic concepts in embedded systems, System on chips and exposure to FPGA board level operations.

Workshop Contents

|| Recorded Videos of the Workshop || Lecture Slides: Day-1 || Lecture Slides: Day-2 || Lecture Slides: Day-3 || Lecture Slides: Day-4 ||
  • Microcontrollers and Application processors
  • ARM ecosystem: processor families and evolution of the ARM architecture
  • Introduction to ARM Cortex-M architecture
  • System-on-Chip technologies based on ARM Cortex-M
  • A case-study: STM32 SoC devices
  • Software development and debug tools, GNU toolchain
  • ARM CMSIS framework
  • CMSIS Neural Network library (CMSIS-NN)
  • Real-Time Operating Systems
  • A case-study: FreeRTOS
  • Introduction to ARM Cortex-A architecture
  • ARM Cortex-A software stack
  • Hardware-customizable FPGA-based System-on-Chip technologies
  • Case-study: Xilinx Zynq-7000 SoC architecture
  • An overview of Xilinx FPGA design flows
  • FPGA-based customized hardware acceleration and opportunities for Approximate Computing
Resource Person

Dr. ALESSANDRO CILARDO
Associate Professor,
Department of Electrical Engineering and Information Technologies,
University of Naples Federico II, Italy.

Dr. Alessandro Cilardo is an associate professor with the University of Naples Federico II. He received a five-year degree in Electronics Engineering cum laude, in 2003, and a PhD degree in Computer Science in November 2006. He is the single or main author of around 90 peer-reviewed papers published in leading scientific journals and conferences, including various IEEE and ACM transactions, as well as top conferences like DATE and FPL. His research focuses on computer architecture, digital design methodologies, computer arithmetic as well as security and cryptography-related processing. He is involved in a number of funded projects at both the national level and the European level (7FP and H2020 projects). He is a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE) and the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).

Duration, Date & Time

  • Workshop will be conducted in online mode through Microsoft Teams.
  • Total duration of the workshop is 12 hours, spanning across two weekends.
  • Date: 29.05.2021 (Saturday), 30.05.2021 (Sunday), 05.06.2021 (Saturday), 06.06.2021 (Sunday)
  • There will be 2 sessions of 90 minutes duration on each day.
  • Session 1: 11.30am - 1.00pm, Session 2: 1.30pm - 3.00pm (IST)

Eligibility, Registration & Selection

The workshop is open to

  • UG, PG, Ph.D Students and Faculty from CSE/ECE/EEE/IT background.
  • Technical Personnel from R&D organisations/industries and technical staff working in R&D projects.
  • There is NO REGISTRATION FEE. Only limited seats are there and will be filled by First Come First Serve Basis.
  • Interested candidates are requested to submit the registration form on or before 26.05.2021. One person can fill the registration form only once.
  • Application Registration Form
  • Provisional list of shortlisted candidates will be displayed on this website on 24.05.2021 (Round-1),26.05.2021(Round -2) and 27.05.2021 (Final Round).
  • Shortlisted candidates will receive the Microsoft Teams link to join the workshop.

Workshop Coordinators

Dr. John Jose & Dr. T. Venkatesh
Department of Computer Science & Engineering,
IIT Guwahati, Guwahati, Assam 781039.

Contact:

e-mail: sparc.cse.iitg@gmail.com
Mobile number: 9048665842 / 8848427144