INTERNATIONAL WORKSHOP on

Design Principles for Next Generation Embedded Computing Systems

(Under the SPARC Project P:271 - 'Approximate Computing Techniques for Resource Constrained Edge Devices')

5-8 and 12-13, July 2021.


Latest Updates:
A workshop on advanced topics on embedded system design concepts as an extension of this workshop is planned in September first week. Please refer to this website for its updates by 20.08.2021.
Recorded Videos and Lecture Slides [updated on 14.07.2021].
Final List of Attendees for which E-certificates are issued. [updated on 03.08.2021]
Final List of Confirmed Candidates [updated on 02.07.2021].
For any further queries, contact sparc.cse.iitg@gmail.com [Phone: 8848427144]

Workshop Brochure. || Application Registration Form (Last date: 28.06.2021) REGISTRATION CLOSED !

About the Workshop

Next generation embedded systems are expected to face several design challenges due to the increasing complexity on both hardware and software side. These complexities are expected to rise to fulfil increasing end user demands and penetration of embedded devices into several application domains with varying demands. For example, timing concerns need to be considered for real-time and safety-critical systems and energy for battery-operated systems. Some application domains may also demand for reliability and/or security. This workshop will cover design principles for embedded systems when deployed in different application domains in order to address the involved challenges. The design principle needs to consider the metrics of importance for a given application domain. Depending upon the metrics to be considered, the designer can employ design-time and/or run-time optimisation principles to achieve the best design. The workshop will also demonstrate practical programming aspects for a modern multi-core based embedded system. Finally, the envisioned future challenges to identify the best design principle will be discussed.

Workshop Contents

|| Recorded Videos of the Workshop ||
||Lecture Slides: || I. Introduction || II. Next Generation Embedded Systems || III. Design Time Optimizations || IV. Run Time Optimizations || V. Programming Demonstrations || VI. Envisioned Future ||
  • Introduction to embedded systems
  • Multi-core based next generation embedded systems
  • Applications execution on next generation embedded systems
  • Important metrics for embedded systems
  • Design-time optimisation principles for various metrics
  • Run-time time optimisation principles for various metrics
  • Online programming demonstration for a multi-core based embedded system
  • Envisioned future and design challenges for next generation embedded systems
Resource Person

Dr. AMIT KUMAR SINGH
Associate Professor
School of Computer Science and Electronic Engineering
University of Essex, UK.

Dr. Amit Kumar Singh is an Associate Professor at University of Essex, UK. He received the B.Tech. degree in Electronics Engineering from Indian Institute of Technology (Indian School of Mines), Dhanbad, India, in 2006, and the Ph.D. degree from the School of Computer Engineering, Nanyang Technological University (NTU), Singapore, in 2013. He was with HCL Technologies, India for a year and half until 2008. He has a post-doctoral research experience for over five years at several reputed universities. His current research interests are design and optimisation of multi-core based computing systems with focus on performance, energy, temperature, reliability and security. He has published over 100 papers in reputed journals/conferences, and received several best paper awards, e.g. IEEE TC February 2018 Featured Paper, ICCES 2017, ISORC 2016, PDP 2015, HiPEAC 2013 and GLSVLSI 2014 runner up. He has served on the TPC of IEEE/ACM conferences like DAC, DATE, CASES and CODES+ISSS..

Amit Kumar Singh: Home Page , Google scholar

Duration, Date & Time

  • Workshop will be conducted in online mode through Ms Teams platform.
  • Total duration of the workshop is 12 hours, spanning across six days.
  • Date: 05.07.2021 (Monday) to 08.07.2021 (Thursday) and 12.07.2021 (Monday) to 13.07.2021 (Tuesday)
  • Session timings: 11:30 AM - 1:30 PM (IST)

Eligibility Criteria

The workshop is open to

  • UG, PG, and Ph.D Students as well as Faculty from CSE/ECE/EEE/IT background.
  • Technical personnel from R&D organisations/industries and technical staff working in R&D projects.
Application Registration & Selection Process

  • There is NO REGISTRATION FEE. Only limited seats are there and will be filled by First Come First Serve Basis.
  • Interested candidates are requested to submit the Application Registration Form on or before 28.06.2021. One person can fill the registration form only once.
  • Application Registration Form
  • Provisional list of shortlisted candidates will be displayed on this website on 29.06.2021 based on applications received till then.
  • All shortlisted candidates have to confirm their seats on or before 01.07.2021 as per the directions given.
  • Candidates who have submitted their application are requested to check this website on 29.06.2021 for completing the confirmation process.
  • MS Teams link to join the workshop will be emailed to only those candidates who confirm their registration.
  • E-certificates will be provided to only those participants who attend all sessions of the workshop.

Workshop Coordinators

Dr. John Jose & Dr. T. Venkatesh
Department of Computer Science & Engineering,
IIT Guwahati, Guwahati, Assam 781039.

Contact:

e-mail: sparc.cse.iitg@gmail.com
Mobile number: 9048665842 / 8848427144