Hi, Welcome to my webpage

I am a
P.hD. Student in dept. of CSE
at IIT Guwahati

I am part of the Multicore Architecture Research Systems (MARS) Lab, under the supervision of Dr. John Jose and co-supervision of Dr. T. Venkatesh . My broader area of research lies in computer architecture and operating systems.

Currently, I am working towards "Memory Disaggregation in Data Centers" as a part of my P.hD. research. Due to un-availability of hardware support and CXL interconnects, I had developed a cycle-level simulation framework DRackSim for experimentation of Scalable Disaggregated Pooled Memory Systems. Here is the link of my github Repo

Apart from this, I am exploring Chiplet-based IMC accelerators and had been working on few research problems with my lab-mate.

Education

P.hD. (2019-Present)

M.Tech (2010-2012)

B.Tech (2006-2010)

Senior Secondary (2005-2006)

Matriculation (2003-2004)

Award & Achievements

2023
Received a travel grant of $1000 from IEEE CEDA for presenting my work in the PhD Forum at Embedded Systems Week (ESWEEK)-2023 to be held in Hamburg, Germany

2018
Top Scorer, Multi-Core Computer Architecture - Storage and Interconnects (NPTEL)

2016
GATE, CSE

2015
UGC NET, Computer Applications

Teaching Assistance

2021, 2022, 2023
CS350M Computer Systems (Minor Course)

2020, 2021, 2022
CS343/344 Operating Systems Theory/Lab

2020
CS558 Computer Systems Lab

2019
CS101 Introduction to Computing

NPTEL
Advance Computer Architecture
Multi-Core Computer Architecture - Storage and Interconnects

Publications

Amit Puri, John Jose, Tamarapalli Venkatesh
Understanding the Performance Impact of Queue-Based Resource Allocation in Scalable Disaggregated Memory Systems
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip [MCSOC-2023], Singapore, December, 2023. (To appear)

Amit Puri, Kartheek Bellamkonda, Kailash Narreddy, John Jose, Venkatesh Tamarapalli
A Practical Approach For Workload-Aware Data Movement in Disaggregated Memory Systems
Proceedings of the 35th IEEE International Symposium on Computer Architecture and High Performance Computing [SBAC-PAD-2023], Porto Alegre, Brazil, October, 2023. (To appear)

Amit Puri, John Jose, Tamarapalli Venkatesh
Design and Evaluation of a Rack-Scale Disaggregated Memory Architecture For Data Centers
Proceedings of 24th IEEE International Conference on High Performance Computing and Communications [HPCC-2022], Chengdu, China, December, 2022. DOI

Communicated

Amit Puri, Kartheek Bellamkonda, Kailash Narreddy, John Jose, Tamarapalli Venkatesh, Vijaykrishnan Narayanan
DRackSim: Simulator for Rack-Scale Disaggregated Memory Systems

Technical Skills

Programming Languages & Databases
C, C++, C#, Java, .NET, Python, SQL Server

Tools & Simulators
Intel PINTOOL, DRAMSIM2, Gem5, ChampSim, Siam and other architectural tools

Parallel Programming and Communication Libraries
OpenMP, MPI, PThread, Linux IPC (FIFO, PIPES, MsgQue, RPC, Shared Memory, Sockets, Raw Sockets)

Others Programming Skills
LEGO NXT Robotics Kit, Raspberry Pi, Arduino, Setting up a Beowulf Cluster (for MPI) with Distributed File Systems

Work Experiences

Jan,2019 - Dec,2019

July,2016 - Dec,2017

July,2014 - May,2016

July,2012 - April,2014

I am a
P.hD. Student in dept. of CSE
at IIT Guwahati

Education

Award & Achievements

Teaching Assistance

Publications

Communicated

Technical Skills

Work Experiences

Contact Information

Keep Learning, Keep Growing.

I am aP.hD. Student in dept. of CSE at IIT Guwahati

Education

Award & Achievements

Teaching Assistance

Publications

Communicated

Technical Skills

Work Experiences

Contact Information

Keep Learning, Keep Growing.

I am a
P.hD. Student in dept. of CSE
at IIT Guwahati