Syllabus (Core): M.Tech

Digital IC Design

Code: EE 514 | L-T-P-C : 3-0-0-6

Course Contents:

Basic Electrical Properties of MOS circuits: MOS transistor operation in linear and saturated regions, MOS transistor threshold voltage, MOS switch and inverter, latch-up in CMOS inverter; sheet resistance and area capacitances of layers, wiring capacitances; CMOS inverter properties - robustness, dynamic performance, regenerative property, inverter delay times, switching power dissipation, MOSFET scaling - constant-voltage and constant-field scaling; dynamic CMOS design: steady-state behavior of dynamic gate circuits, noise considerations in dynamic design, charge sharing, cascading dynamic gates, domino logic, np-CMOS logic, problems in single- phase clocking, two-phase non-overlapping clocking scheme; subsystem design: design of arithmetic building blocks like adders – static, dynamic, Manchester carry-chain, look-ahead, linear and square-root carry-select, carry bypass and pipelined adders and multipliers - serial-parallel, Braun, Baugh-Wooley and systolic array multipliers, barrel and logarithmic shifters, area-time tradeoff, power consumption issues; designing semiconductor memory and array structures: memory core and memory peripheral circuitry.

Texts / References:

1. J.M. Rabaey, A. Chandrakasan and B. Nikolic, Digital Integrated Circuits- A Design Perspective, 2nd ed., PHI, 2003
2. N.H.E. Weste and K. Eshraghian, Principles of CMOS VLSI Design - a System Perspective, 2nd ed., Pearson Education Asia, 2002
3. S.M. Kang and Y. Leblevici, CMOS Digital Integrated Circuits Analysis and Design, 3rd ed., McGraw Hill, 2003
4. J. P. Uyemura, Introduction to VLSI Circuits and Systems, John Wiley & Sons (Asia) Pte Ltd, 2002
5. R. Jacob Baker, CMOS Circuit Design, Layout, and Simulation, IEEE Press, 1997.