COMPUTER ORGANIZATION AND ARCHITECTURE

Code: MA251 | L-T-P-C: 3-0-0-6

Number Systems: representations of numbers (binary, octal, decimal, and hexadecimal), arithmetic of signed and unsigned numbers; Boolean algebra and logic gates: gate level minimization of Boolean functions; Combinational logic circuits: design and analysis, some standard combinational circuits (encoders, decoders, multiplexers); Sample and hold Circuits, analog-to-digital converter, digital-to-analog converter.

Synchronous sequential logic circuits: design and analysis; flip-flops, registers, counters; Finite state model: state tables and state diagram, state minimization; Memory organization: hierarchical memory systems, cache memories, cache coherence, virtual memory; System buses: interconnection structures and bus interconnection, Arithmetic Logic Unit.

Study of an existing CPU: architecture, instruction set and the addressing modes supported; assembly language programming; Control unit design: instruction interpretation, hardwired and microprogrammed methods of design; RISC and CISC paradigms. I/O transfer techniques: programmed, interrupt-driven and DMA; I/O processors and channels, mapping of I/O addresses.

Texts:

1. A. S. Tenenbaum, Structured Computer Organization, 5th Edition, Prentice-Hall of India, 2005.
2. W. Stallings, Computer Organization and Architecture: Designing for Performance, 6th Edition, Prentice Hall of India, 2005.

References:

1. M. M. Mano, Digital Design, 3rd Edition, Pearson Education Asia, 2002.
2. J. Hennessy and D. Patterson, Computer Architecture A Quantitative Approach, 3rd Edition, Morgan Kaufmann, 2002.
3. C. Hamacher, Z. Vranesic, and S. Zaky, Computer Organization, 5th Edition, McGraw-Hill, 2002.
4. P. Pal Chaudhuri, Computer Organization and Design, 2nd Edition, Prentice Hall of India, 1999.
5. J. P. Hayes, Computer Architecture and Organization, 3rd Edition, McGraw-Hill, 1997.